SK Hynix and TSMC Collaborate on Cutting-Edge HBM4 Development

SK hynix and TSMC are collaborating to develop next-generation HBM4 memory and advanced packaging technology, with a focus on enhancing performance and offering customized solutions to meet customer needs, while also optimizing integration with TSMC's CoWoS packaging technology.

Accelerates the adoption of HBM4 memory
Allows for customization of HBM solutions to meet customer requirements
Optimizes integration of HBM with TSMC's advanced packaging technology

SK hynix and TSMC have announced a collaboration to develop the next-generation HBM4 memory and advanced packaging technology. The goal is to accelerate the adoption of HBM4 memory and solidify their positions in high-bandwidth memory and advanced processor applications.

The initial focus of this partnership will be on enhancing the performance of the HBM4 stack’s base die, which serves as a wide interface between memory devices and host processors. SK hynix plans to leverage TSMC’s advanced logic process technologies to build base dies that can accommodate additional features and I/O pins within existing spatial constraints.

This collaboration also allows SK hynix to customize HBM solutions to meet various customer requirements for performance and energy efficiency. By teaming up with TSMC, SK hynix can further enhance its offering of custom HBM solutions.

Dr. Kevin Zhang, Senior Vice President of TSMC’s Business Development and Overseas Operations Office, expressed confidence in the partnership, highlighting their previous successful collaborations in providing advanced logic and HBM solutions for AI applications. He emphasized their commitment to delivering integrated solutions that drive new AI innovations.

Additionally, the collaboration aims to optimize the integration of SK hynix’s HBM with TSMC’s CoWoS advanced packaging technology. CoWoS is a popular 2.5D packaging process for integrating logic chips and stacked HBM into a unified module.

While it is expected that HBM4 memory will initially be integrated with logic processors using direct bonding, some customers may opt for an advanced version of CoWoS to integrate HBM4 with their processors.

Justin Kim, President and Head of AI Infra at SK hynix, expressed confidence that the partnership with TSMC will accelerate their efforts for open collaboration with customers and strengthen their position as a leading provider of AI memory solutions. The collaboration will enhance their competitiveness in the custom memory platform space.

In summary, the collaboration between SK hynix and TSMC aims to develop the next-generation HBM4 memory and advanced packaging technology. By leveraging TSMC’s expertise, SK hynix seeks to enhance the performance of HBM4 and offer customized solutions to meet diverse customer needs. This partnership also focuses on optimizing the integration of HBM with TSMC’s advanced packaging technology.

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Background Information

About SK hynix: SK Hynix is a important South Korean semiconductor company known for its innovative contributions to the global technology landscape. Specializing in the production of memory solutions, SK Hynix has played a vital role in shaping the semiconductor industry. With a commitment to research and development, they have continuously pushed the boundaries of memory technology, resulting in products that power various devices and applications.

About TSMC: TSMC, or Taiwan Semiconductor Manufacturing Company, is a semiconductor foundry based in Taiwan. Established in 1987, TSMC is a important player in the global semiconductor industry, specializing in the manufacturing of semiconductor wafers for a wide range of clients, including technology companies and chip designers. The company is known for its semiconductor fabrication processes and plays a critical role in advancing semiconductor technology worldwide.

Technology Explained

CoWoS: CoWoS, or Chip-on-Wafer-on-Substrate, is a recent advancement in chip packaging that allows for more powerful processors in a compact size. This technology stacks multiple chips on a silicon interposer, enabling denser connections and improved performance. Developed for high-performance computing, CoWoS promises faster processing, lower power consumption, and the ability to pack more processing power into smaller devices.