GUC introduces 32 Gbps UCIe Silicon Built on TSMC’s 3nm and CoWoS Innovations


March 13, 2025 by our News Team

GUC introduces world's first UCIe PHY silicon with record-breaking speed and advanced reliability features, paving the way for next-generation high-performance computing.

  • 32 Gbps per lane
  • Bandwidth density (full-duplex): 5 Tbps/mm
  • Bridges for AXI, CXS, and CHI buses


GUC Breaks New Ground with UCIe PHY Silicon

In a significant leap for the semiconductor industry, Global Unichip Corp. (GUC) has just launched the world’s first Universal chiplet Interconnect Express (UCIe) PHY silicon. This isn’t just any silicon; it’s capable of hitting a blistering 32 Gbps per lane, making it the fastest speed outlined in the UCIe specifications. For those keeping score, that translates to a jaw-dropping bandwidth density of 10 Tbps per millimeter of die edge, or a full-duplex speed of 5 Tbps/mm. Impressive, right?

This milestone was made possible by leveraging TSMC’s N3P process and CoWoS packaging technologies, with applications aimed squarely at AI, high-performance computing (HPC), XPU, and networking sectors. In this test chip, multiple dies are interconnected via a CoWoS interposer, showcasing robust performance with wide eye openings both horizontally and vertically. GUC is currently in the throes of full-corner qualification, with a complete silicon report expected to drop in the next quarter.

Seamless Integration with Advanced Bridges

But what does this mean for developers and engineers? To facilitate a smooth transition from traditional single-chip Networks-on-Chip (NoC) to chiplet-based architectures, GUC has rolled out bridges for AXI, CXS, and CHI buses that utilize the UCIe Streaming Protocol. These bridges are designed with high traffic density in mind, ensuring low power consumption and minimal data transfer Latency. Plus, they support Dynamic Voltage and Frequency Scaling (DVFS), allowing real-time adjustments of voltage and frequency for each die—without causing any interruptions in data flow. Imagine the efficiency gains!

Advanced Reliability Features

GUC isn’t just stopping at speed and efficiency; they’re also prioritizing reliability. Their UCIe IP comes equipped with advanced reliability features, including the UCIe Preventive Monitoring functionality and integrated I/O signal quality monitors from proteanTecs. This means that during data transmission, signal integrity is continuously monitored, allowing for real-time detection of any power or signal integrity issues. If potential defects arise, repair algorithms can kick in to replace marginal I/Os with redundant ones, effectively preventing system failures. Talk about a proactive approach to extending chip lifespan!

Looking Ahead: The Future of UCIe IP

As if that wasn’t enough, GUC is already looking to the future. They’ve successfully taped out their second-generation UCIe IP, which aims for an impressive 40 Gbps per lane by late 2024. This new version will incorporate Adaptive Voltage Scaling (AVS), promising around a 2x improvement in power efficiency. And for those curious about 3D integration, a face-up version of the UCIe-40G IP, designed for integration with Through-Silicon Vias (TSVs), is on the horizon for tape-out in the coming months.

Even more exciting, GUC’s third-generation UCIe IP, which will push the envelope to 64 Gbps per lane, is currently in development and set to tape out later this year. The entire UCIe product line is optimized for various CoWoS configurations and TSMC’s future SoW-X platform.

Voices from GUC: A Commitment to Innovation

“We are thrilled to announce the successful silicon bring-up of the world’s first UCIe IP supporting 32 Gbps,” said Aditya Raina, CMO of GUC. “With our silicon-proven chiplet IP portfolio across TSMC’s 7 nm, 5 nm, and 3 nm process technologies, we’re not just delivering IP; we’re providing robust solutions that empower our customers to accelerate design cycles for their AI, HPC, and networking products.”

Igor Elkanovich, GUC’s CTO, echoed this sentiment, stating, “We are committed to delivering the highest performance and lowest power 2.5D/3D chiplet and HBM interface IPs. The convergence of these technologies is paving the way for the next generation of high-performance computing.”

GUC UCIe-32G Silicon Highlights

32 Gbps per lane

Bandwidth density (full-duplex): 5 Tbps/mm

Bridges for AXI, CXS, and CHI buses

Dynamic Voltage and Frequency Scaling (DVFS)

UCIe Preventive Monitoring: per lane, in-mission mode I/O signal quality monitoring by proteanTecs

With all these advancements, GUC is undoubtedly setting the stage for a new era in chip technology. The question is, how will this impact the future of computing? Only time will tell, but one thing is for sure: the race for faster, more reliable chips is on!

GUC introduces 32 Gbps UCIe Silicon Built on TSMC’s 3nm and CoWoS Innovations

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Background Information


About TSMC:

TSMC, or Taiwan Semiconductor Manufacturing Company, is a semiconductor foundry based in Taiwan. Established in 1987, TSMC is a important player in the global semiconductor industry, specializing in the manufacturing of semiconductor wafers for a wide range of clients, including technology companies and chip designers. The company is known for its semiconductor fabrication processes and plays a critical role in advancing semiconductor technology worldwide.

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Technology Explained


chiplet: Chiplets are a new type of technology that is revolutionizing the computer industry. They are small, modular components that can be used to build powerful computing systems. Chiplets are designed to be used in combination with other components, such as processors, memory, and storage, to create a complete system. This allows for more efficient and cost-effective production of computers, as well as more powerful and versatile systems. Chiplets can be used to create powerful gaming PCs, high-end workstations, and even supercomputers. They are also being used in the development of artificial intelligence and machine learning applications. Chiplets are an exciting new technology that is changing the way we build and use computers.

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CoWoS: CoWoS, or Chip-on-Wafer-on-Substrate, is a recent advancement in chip packaging that allows for more powerful processors in a compact size. This technology stacks multiple chips on a silicon interposer, enabling denser connections and improved performance. Developed for high-performance computing, CoWoS promises faster processing, lower power consumption, and the ability to pack more processing power into smaller devices.

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HPC: HPC, or High Performance Computing, is a type of technology that allows computers to perform complex calculations and process large amounts of data at incredibly high speeds. This is achieved through the use of specialized hardware and software, such as supercomputers and parallel processing techniques. In the computer industry, HPC has a wide range of applications, from weather forecasting and scientific research to financial modeling and artificial intelligence. It enables researchers and businesses to tackle complex problems and analyze vast amounts of data in a fraction of the time it would take with traditional computing methods. HPC has revolutionized the way we approach data analysis and has opened up new possibilities for innovation and discovery in various fields.

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Latency: Technology latency is the time it takes for a computer system to respond to a request. It is an important factor in the performance of computer systems, as it affects the speed and efficiency of data processing. In the computer industry, latency is a major factor in the performance of computer networks, storage systems, and other computer systems. Low latency is essential for applications that require fast response times, such as online gaming, streaming media, and real-time data processing. High latency can cause delays in data processing, resulting in slow response times and poor performance. To reduce latency, computer systems use various techniques such as caching, load balancing, and parallel processing. By reducing latency, computer systems can provide faster response times and improved performance.

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XPU: XPU is a type of processor technology developed by Intel that is designed to provide high performance computing capabilities for a variety of applications. It is based on the x86 instruction set architecture and is capable of running multiple threads simultaneously. XPUs are used in a variety of computer systems, including desktop PCs, servers, and embedded systems. They are also used in gaming consoles, such as the Xbox One and PlayStation 4. XPUs are designed to provide faster processing speeds, improved power efficiency, and better multitasking capabilities. They are also capable of running multiple operating systems, allowing for more flexibility in the types of applications that can be run on the system. XPUs are becoming increasingly popular in the computer industry due to their ability to provide high performance computing capabilities at a relatively low cost.

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