Avnet ASIC Team Unveils Cutting-Edge Ultra-Low-Power Design Services for TSMC’s 4nm Nodes


July 22, 2024 by our News Team

Avnet ASIC, a division of Avnet Silica, has launched ultra-low-power design services for TSMC's cutting-edge 4 nm and below process technologies, providing customers with exceptional power efficiency and performance for high-performance applications like blockchain and AI edge computing.

  • Access to TSMC's cutting-edge 4 nm and below process technologies
  • Comprehensive approach to optimize power, performance, and area tradeoffs
  • Collaborative effort with customers to ensure ultra-low-power performance


Avnet ASIC, a division of Avnet Silica, an Avnet company, has just announced the launch of its new ultra-low-power design services for TSMC’s cutting-edge 4 nm and below process technologies. This is big news for customers looking to achieve exceptional power efficiency and performance in their high-performance applications, like blockchain and AI edge computing.

Now, before we dive into the details, let’s take a moment to appreciate the significance of this announcement. TSMC, the world’s leading silicon Foundry, has partnered with Avnet ASIC, a leading provider of ASIC and SoC full turnkey solutions. It’s like a match made in tech heaven.

So, what exactly do these design services entail? Well, they take a comprehensive approach to tackle the challenges of operating at extreme low-voltage conditions in the 4 nm and below nodes. Avnet ASIC is pulling out all the stops to optimize power, performance, and area (PPA) tradeoffs. They’re recharacterizing standard cells for lower voltages, performing early RTL exploration, implementing an optimized clock tree, and using transistor-level simulations to enhance the power optimization process. It’s a full-scale technical A-Z approach to enable PPA optimization of high-performance chips working at extremely low voltage.

And here’s the best part: this approach has already been put to the test in TSMC’s 4 nm process. The Avnet ASIC team has confirmed performance, dynamic, and leakage power estimations through post-silicon validation. In other words, they’ve got the receipts to back up their claims.

But it’s not just about the technical side of things. Avnet ASIC understands that customer needs are at the heart of any successful design. That’s why they work closely with their customers to define the board solution and chip implementation concept. They take into account the requirements and execute front-end design based on library characterization for near-threshold voltage operation. It’s a collaborative effort that ensures the ultra-low-power performance of the customer’s application.

Pavel Vilk, GM and Head of Engineering at Avnet ASIC, sums it up perfectly: “One of the industry challenges today is to optimize application performance by choosing the correct technology to meet customer needs. TSMC’s 4 nm process provides a great opportunity to save power and area without compromising target performance. However, operating at low voltages puts a lot of effort on voltage drop, which needs to be optimized through a holistic solution of board-package-chip design. Being a TSMC Value Chain Aggregator and a full turnkey partner to customers, we believe this new achievement could bring great value in helping our customers deliver their products to market competitively.”

Now, if you’re wondering what led to this exciting collaboration between Avnet ASIC and TSMC, let me fill you in. Back in February, the Avnet ASIC team was appointed as a Value Chain Aggregator (VCA) by TSMC. This means that they act as a channel for TSMC ASIC customers, offering a full turnkey solution from design inception to layout and mass production, all implemented in TSMC’s most advanced silicon processes. It’s a win-win situation that combines the technological prowess of TSMC with the design and manufacturing capabilities of Avnet ASIC.

All in all, this partnership between Avnet ASIC and TSMC is a game-changer. It opens up access to TSMC’s most advanced silicon processes for customers, establishing Avnet ASIC as a channel partner of TSMC for comprehensive ASIC SoC solutions. And that’s something worth celebrating in the world of tech.

Avnet ASIC Team Unveils Cutting-Edge Ultra-Low-Power Design Services for TSMC’s 4nm Nodes

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Background Information


About TSMC: TSMC, or Taiwan Semiconductor Manufacturing Company, is a semiconductor foundry based in Taiwan. Established in 1987, TSMC is a prominent player in the global semiconductor industry, specializing in the manufacturing of semiconductor wafers for a wide range of clients, including technology companies and chip designers. The company is known for its cutting-edge semiconductor fabrication processes and plays a critical role in advancing semiconductor technology worldwide.

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Technology Explained


Foundry: A foundry is a dedicated manufacturing facility focused on producing semiconductor components like integrated circuits (ICs) for external clients. These foundries are pivotal in the semiconductor industry, providing diverse manufacturing processes and technologies to create chips based on designs from fabless semiconductor firms or other customers. This setup empowers companies to concentrate on innovative design without needing substantial investments in manufacturing infrastructure. Some well-known foundries include TSMC (Taiwan Semiconductor Manufacturing Company), Samsung Foundry, GlobalFoundries, and UMC (United Microelectronics Corporation).


SoC: A System-on-Chip (SoC) is a highly integrated semiconductor device that encapsulates various electronic components, including processors, memory, input/output interfaces, and often specialized hardware components, all on a single chip. SoCs are designed to provide a complete computing system or subsystem within a single chip package, offering enhanced performance, power efficiency, and compactness. They are commonly used in a wide range of devices, from smartphones and tablets to embedded systems and IoT devices, streamlining hardware complexity and facilitating efficient integration of multiple functions onto a single chip.





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