GUC introduces 32 Gbps UCIe Silicon Built on TSMC’s 3nm and CoWoS Tech

GUC introduces UCIe PHY Silicon

In a significant leap for the semiconductor industry, Global Unichip Corp. (GUC) has just rolled out the world’s first Universal chiplet Interconnect Express (UCIe) PHY silicon. This isn’t just another chip; it’s a powerhouse, boasting a data rate of 32 Gbps per lane—the highest speed ever defined in the UCIe specification. Imagine the possibilities with a staggering bandwidth density of 10 Tbps per 1 mm of die edge (or 5 Tbps/mm in full-duplex mode). That’s some serious performance, especially for applications in AI, high-performance computing (HPC), XPU, and networking.

So, how did GUC pull this off? They leveraged TSMC’s N3P process and CoWoS packaging technologies. The test chip features multiple dies interconnected through a CoWoS interposer, showcasing robust 32 Gbps operation with impressive horizontal and vertical eye openings. GUC is on the fast track for full-corner qualification, with a complete silicon report expected soon.

Seamless Integration with Innovative Bridges

To make sure everything works together like a well-oiled machine, GUC has developed bridges for AXI, CXS, and CHI buses using the UCIe Streaming Protocol. What does this mean for you? These bridges are designed for high traffic density and low power consumption, minimizing data transfer Latency and ensuring efficient end-to-end flow control. This transition from traditional single-chip Networks-on-Chip (NoC) to chiplet-based architectures is about to get a whole lot smoother.

But wait, there’s more! These bridges also support Dynamic Voltage and Frequency Scaling (DVFS). This nifty feature allows real-time voltage and frequency adjustments for each die independently, all without interrupting data flow. It’s like having a smart thermostat for your chips, optimizing performance without missing a beat.

Advanced Reliability Features for Next-Gen Performance

Reliability is key, and GUC’s UCIe IP doesn’t skimp on that front. With advanced reliability capabilities, including UCIe Preventive Monitoring and integrated I/O signal quality monitors from proteanTecs, this technology keeps a watchful eye on signal integrity during data transmission. Imagine having a system that can detect power and signal integrity anomalies in real-time without needing to pause operations. Each signal lane is monitored individually, allowing for early identification of potential defects. If something seems off, repair algorithms kick in, replacing any marginal I/Os with redundant ones to avoid system failures. This proactive strategy not only extends the lifespan of the chip but also significantly boosts overall system reliability.

Looking Ahead: What’s Next for GUC?

GUC isn’t stopping here. They’re pushing the envelope further with their second-generation UCIe IP, which has already taped out at an impressive 40 Gbps per lane. Set to launch in late 2024, this version incorporates Adaptive Voltage Scaling (AVS), promising roughly double the power efficiency. Plus, a face-up version of the UCIe-40G IP designed for 3D integration with Through-Silicon Vias (TSVs) is on the horizon.

And if that’s not enough to get you excited, GUC’s third-generation UCIe IP, capable of reaching 64 Gbps per lane, is currently in development and slated for tape-out in the second half of this year. The UCIe product line is optimized for all types of CoWoS and future TSMC’s SoW-X platform, ensuring they’re ready for whatever the future holds.

Voices from GUC: A Commitment to Innovation

Aditya Raina, GUC’s CMO, shared his enthusiasm: “We are excited to announce the successful silicon bring-up of the world’s first UCIe IP supporting 32 Gbps. With a comprehensive, silicon-proven 2.5D/3D chiplet IP portfolio across TSMC’s 7 nm, 5 nm, and 3 nm process technologies, we deliver robust solutions that go beyond IP.”

Igor Elkanovich, GUC’s CTO, added, “We are committed to delivering the highest performance and lowest power 2.5D/3D chiplet and HBM interface IPs.” The convergence of 2.5D and 3D packaging technologies is paving the way for modular processors that can exceed traditional reticle size limitations, setting the stage for the next generation of high-performance computing.

GUC UCIe-32G Silicon Highlights

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32 Gbps per lane

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Beachfront bandwidth density (full-duplex):

5 Tbps/mm
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AXI, CXS, and CHI bus bridges

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Dynamic Voltage and Frequency Scaling (DVFS)

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UCIe Preventive Monitoring:

per lane, in-mission mode I/O signal quality monitoring by proteanTecs

With these advancements, GUC is not just keeping pace with the rapidly evolving tech landscape; they’re setting the bar higher. The future of chiplet technology looks bright, and GUC is leading the charge. Are you ready for what’s next?

Background Information

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About TSMC:

TSMC, or Taiwan Semiconductor Manufacturing Company, is a semiconductor foundry based in Taiwan. Established in 1987, TSMC is a important player in the global semiconductor industry, specializing in the manufacturing of semiconductor wafers for a wide range of clients, including technology companies and chip designers. The company is known for its semiconductor fabrication processes and plays a critical role in advancing semiconductor technology worldwide.

  

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Technology Explained

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chiplet: Chiplets are a new type of technology that is revolutionizing the computer industry. They are small, modular components that can be used to build powerful computing systems. Chiplets are designed to be used in combination with other components, such as processors, memory, and storage, to create a complete system. This allows for more efficient and cost-effective production of computers, as well as more powerful and versatile systems. Chiplets can be used to create powerful gaming PCs, high-end workstations, and even supercomputers. They are also being used in the development of artificial intelligence and machine learning applications. Chiplets are an exciting new technology that is changing the way we build and use computers.

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CoWoS: CoWoS, or Chip-on-Wafer-on-Substrate, is a recent advancement in chip packaging that allows for more powerful processors in a compact size. This technology stacks multiple chips on a silicon interposer, enabling denser connections and improved performance. Developed for high-performance computing, CoWoS promises faster processing, lower power consumption, and the ability to pack more processing power into smaller devices.

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HPC: HPC, or High Performance Computing, is a type of technology that allows computers to perform complex calculations and process large amounts of data at incredibly high speeds. This is achieved through the use of specialized hardware and software, such as supercomputers and parallel processing techniques. In the computer industry, HPC has a wide range of applications, from weather forecasting and scientific research to financial modeling and artificial intelligence. It enables researchers and businesses to tackle complex problems and analyze vast amounts of data in a fraction of the time it would take with traditional computing methods. HPC has revolutionized the way we approach data analysis and has opened up new possibilities for innovation and discovery in various fields.

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Latency: Technology latency is the time it takes for a computer system to respond to a request. It is an important factor in the performance of computer systems, as it affects the speed and efficiency of data processing. In the computer industry, latency is a major factor in the performance of computer networks, storage systems, and other computer systems. Low latency is essential for applications that require fast response times, such as online gaming, streaming media, and real-time data processing. High latency can cause delays in data processing, resulting in slow response times and poor performance. To reduce latency, computer systems use various techniques such as caching, load balancing, and parallel processing. By reducing latency, computer systems can provide faster response times and improved performance.

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XPU: XPU is a type of processor technology developed by Intel that is designed to provide high performance computing capabilities for a variety of applications. It is based on the x86 instruction set architecture and is capable of running multiple threads simultaneously. XPUs are used in a variety of computer systems, including desktop PCs, servers, and embedded systems. They are also used in gaming consoles, such as the Xbox One and PlayStation 4. XPUs are designed to provide faster processing speeds, improved power efficiency, and better multitasking capabilities. They are also capable of running multiple operating systems, allowing for more flexibility in the types of applications that can be run on the system. XPUs are becoming increasingly popular in the computer industry due to their ability to provide high performance computing capabilities at a relatively low cost.

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