Marvell introduces Innovative HBM Architecture to Enhance Cloud AI Performance


December 11, 2024 by our News Team

Marvell Technology, Inc. has announced a custom HBM compute architecture in collaboration with industry giants, promising enhanced performance, efficiency, and cost savings for cloud data center operators.

  • Available to all custom silicon customers
  • Tailored solutions for enhanced performance
  • Real estate savings and increased memory capacity


Marvell’s Bold Leap into Custom HBM

Today, Marvell Technology, Inc. is shaking things up in the world of data infrastructure with a announcement: they’ve developed a new custom HBM compute architecture that promises to elevate the performance and memory density of XPUs. What’s exciting here is that this innovation isn’t just for Marvell; it’s available to all their custom silicon customers, aiming to enhance performance, efficiency, and total cost of ownership (TCO) across the board.

Teaming Up with Industry Giants

To make this vision a reality, Marvell is teaming up with heavyweights in the industry—Micron, Samsung Electronics, and SK hynix. Together, they’re crafting custom HBM solutions tailored for the next generation of XPUs. Now, if you’re wondering why this matters, let’s break it down. HBM, or High Bandwidth Memory, is crucial for XPUs, leveraging advanced 2.5D packaging technology and high-speed interfaces. But here’s the catch: the current standard interface architecture is a bit of a bottleneck when it comes to scaling XPUs.

Tailored Solutions for Enhanced Performance

Marvell’s new architecture introduces tailored interfaces that optimize performance, power consumption, die size, and costs for specific XPU designs. This isn’t just a minor tweak; it’s a comprehensive approach that considers everything from the compute silicon and HBM stacks to the packaging itself. By customizing the HBM memory subsystem—including the stack—Marvell is pushing the boundaries of what’s possible in cloud data center infrastructure.

The results? Enhanced XPUs that can serialize and accelerate I/O interfaces between internal AI compute accelerators and HBM base dies. This leads to a remarkable boost in performance, with interface power consumption dropping by up to 70% compared to standard HBM interfaces. Imagine what that means for your data center: less power used, more performance delivered.

Real Estate Savings and More

But wait, there’s more! The optimized interfaces also reduce the silicon real estate needed on each die. This means HBM support logic can be integrated directly onto the base die, leading to real estate savings of up to 25%. What can you do with that extra space? Enhance compute capabilities, add new features, or even support up to 33% more HBM stacks—ultimately increasing memory capacity per XPU. It’s a win-win for performance and efficiency, all while driving down TCO for cloud operators.

Voices from the Industry

Will Chu, Senior Vice President and General Manager of Marvell’s Custom, Compute, and Storage Group, shared his excitement: “The leading cloud data center operators have scaled with custom infrastructure. Enhancing XPUs by tailoring HBM for specific performance, power, and TCO is a pivotal step in revolutionizing AI accelerator design.” It’s clear that Marvell is eager to help cloud data center operators scale their XPUs and infrastructure for the AI era.

Raj Narasimhan from Micron echoed this sentiment, emphasizing that “increased memory capacity and bandwidth will help cloud operators efficiently scale their infrastructure for the AI era.” He highlighted how strategic collaborations focused on power efficiency can provide hyperscalers with a robust platform to deliver optimal performance.

Harry Yoon of Samsung also chimed in, stating that optimizing HBM for specific XPUs will greatly enhance power efficiency and infrastructure performance. And let’s not forget Sunny Kang from SK hynix, who sees this collaboration as a way to produce more optimized solutions for their customers’ workloads.

A New Era for Cloud Infrastructure

As Patrick Moorhead, CEO of Moor Insights & Strategy, put it, “Custom XPUs deliver superior performance and performance per watt compared to general-purpose solutions for specific cloud workloads.” With Marvell at the forefront of custom compute silicon, their latest HBM architecture is set to empower cloud operators to scale their XPUs and infrastructure, paving the way for the future of AI.

In a world where efficiency and performance are paramount, Marvell’s innovations are not just timely; they’re essential. Keep an eye on this space—it’s clear that Marvell is leading the charge into a new era of cloud data center infrastructure. And remember, the future of AI is not just coming; it’s being built right now.

Marvell introduces Innovative HBM Architecture to Enhance Cloud AI Performance

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Background Information


About Samsung:

Samsung, a South Korean multinational conglomerate, has established itself as a global leader in various industries, including electronics, technology, and more. Founded in 1938, Samsung's influence spans from smartphones and consumer electronics to semiconductors and home appliances. With a commitment to innovation, Samsung has contributed products like the Galaxy series of smartphones, QLED TVs, and SSDs that have revolutionized the way we live and work.

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About SK hynix:

SK Hynix is a important South Korean semiconductor company known for its innovative contributions to the global technology landscape. Specializing in the production of memory solutions, SK Hynix has played a vital role in shaping the semiconductor industry. With a commitment to research and development, they have continuously pushed the boundaries of memory technology, resulting in products that power various devices and applications.

SK hynix website  SK hynix LinkedIn
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Technology Explained


XPU: XPU is a type of processor technology developed by Intel that is designed to provide high performance computing capabilities for a variety of applications. It is based on the x86 instruction set architecture and is capable of running multiple threads simultaneously. XPUs are used in a variety of computer systems, including desktop PCs, servers, and embedded systems. They are also used in gaming consoles, such as the Xbox One and PlayStation 4. XPUs are designed to provide faster processing speeds, improved power efficiency, and better multitasking capabilities. They are also capable of running multiple operating systems, allowing for more flexibility in the types of applications that can be run on the system. XPUs are becoming increasingly popular in the computer industry due to their ability to provide high performance computing capabilities at a relatively low cost.

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