AMD is working on enabling support for their upcoming Zen 5 , microarchitecture in GCC, with initial patches confirming new instructions and potential availability for the entire Zen 5 , product family, showcasing their commitment to staying up-to-date with advancements in microarchitecture.
- The Zen 5 , architecture is set to debut later this year, showing AMD's dedication to staying up-to-date with the latest advancements in microarchitecture.
- The initial patches confirm that Zen 5 , will support new instructions, some of which were previously only available in Intel products.
- The report suggests that the same instruction set will be available for the entire Zen 5 , product family, indicating a consistent level of performance across all variants.
AMD has recently started working on enabling support for its upcoming Zen 5 , microarchitecture in the GNU Compiler Collection (GCC). The company has shared the first patches through a mailing list titled “Enable support for next generation AMD Zen 5 , CPU with znver5 scheduler Model.” While it may seem surprising that Zen 5 , enablement is happening now, considering that GCC 14 is expected to be released in March and April, AMD often releases updates even after a new product launch.
The Zen 5 , architecture is set to debut later this year, with the desktop Granite Ridge series and potential mobile variants from the Strix Point series. Interestingly, AMD’s progress on Zen 5 , development is happening alongside Intel’s work on the Clearwater Forest and Panther Lake CPU series, which are not expected to launch this year.
The initial patches confirm that AMD Zen 5 , will support new instructions such as AVXVNNI, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI. Some of these instructions have already been supported by Intel Tiger Lake series but were previously absent in AMD products. The report also suggests that the same instruction set will be available for the entire Zen 5 , product family, indicating that even the more power-efficient variant, Zen5c, will support these instructions.
Since this is an initial enablement, certain scheduling code has been ported from Zen4 until AMD engineers provide an updated version. However, there is still uncertainty regarding the availability of LLVM/Clang compilers for Zen5, as patches for this compiler have not yet been seen.
Overall, AMD’s progress on enabling Zen 5 , in GCC showcases their commitment to keeping up with the latest advancements in microarchitecture. It will be interesting to see how Zen 5 , performs and what improvements it brings to AMD’s lineup of processors.
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